ox16c954 ETC-unknow, ox16c954 Datasheet - Page 19

• Manufacturer Part Number: ox16c954
• Description: High Performance Quad Uart With 128-byte Fifos Intel / Motorola Bus Interface
• Manufacturer: ETC-unknow

Register access notes:
Note 1: Requires LCR[7] = 0
Note 2: Requires ACR[7] = 0
Note 3: Requires that last value written to LCR was not 0xBF
Note 4: To read this register ACR[7] must be = 0
Note 5: To read this register ACR[6] must be = 0
Note 6: Requires ACR[7] = 1
Note 7: Only bits 0 and 1 of this register can be written
Note 8: To read this register ACR[6] must be = 1
Note 9: This register acts as a window through which to read and write registers in the Indexed Control Register set
Data Sheet Revision 1.0
OXFORD SEMICONDUCTOR LTD.
Register
Register
9-bit mode
9-bit mode
9-bit mode
9-bit mode
ASR
Name
XOFF1
XOFF2
Name
ICR
TFL
XON1
XON2
RFL
EFR
3,8,9
1,6,7
3,6
6
Address
Address
010
100
101
110
111
001
011
100
101
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
7
To access these registers LCR must be set to 0xBF
control
Bit 7
Bit 7
CTS
flow
Idle
Tx
Table 5: 650 Compatible Registers
Table 6: 950 Specific Registers
control
Bit 6
Bit 6
Flow
FIFO
RTS
size
Data read/written depends on the value written to the SPR prior to
Special
detect
Number of characters in the transmitter FIFO
Bit 5
Bit 5
FIFO-
char
SEL
Number of characters in the receiver FIFO
the access of this register (see
Enhance
Special
Special Character 2
Detect
Bit 4
Special character 1
Special character 3
Special character 4
Bit 4
mode
XOFF Character 1
XOFF Character 2
Char
XON Character 1
XON Character 2
Bit 3
Bit 3
DTR
Table 7
In-band flow control mode
Bit 2
Bit 2
RTS
)
Disabled
Remote
Bit 1
Bit 1
OX16C954 rev B
Tx
Disabled
Bit 0
Bit 0
Page 19
Tx