isppac10 Lattice Semiconductor Corp., isppac10 Datasheet - Page 29

• Manufacturer Part Number: isppac10
• Description: In-system Programmable Analog Circuit
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 3. Test Fixture Required Components
Output test conditions for all other interfaces are determined by the respective standards. For further details,
please refer to the following technical note:
Default LVCMOS 3.3 I/O (L -> H, H -> L)
Other LVCMOS Settings, (L -> H, H -> L)
Default LVCMOS 3.3 I/O (Z -> H)
Default LVCMOS 3.3 I/O (Z -> L)
Default LVCMOS 3.3 I/O (H -> Z)
Default LVCMOS 3.3 I/O (L -> Z)
• ispMACH 5000VG sysIO Design and Usage Guidelines (TN1000)
Test Condition
*
C L includes Test Fixture and Probe Capacitance.
DUT
110
110
110
R
∞
∞
∞
1
110
110
110
R
∞
∞
∞
2
29
V
R 1
R 2
CCO
35pF
35pF
35pF
35pF
5pF
5pF
C
L
ispMACH 5000VG Family Data Sheet
C L
1.5
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
1.5V
1.5V
V
V
OH
OL
*
+ 0.3
- 0.3
0213A/ispm5kvg
Timing Ref.
Point
Test
CCO
CCO
/2
/2
3.0V
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
3.0V
3.0V
3.0V
3.0V
V
CCO