mm912f634 Freescale Semiconductor, Inc, mm912f634 Datasheet - Page 165

• Manufacturer Part Number: mm912f634
• Description: Mm912f634 - Integrated S12 Based Relay Driver With Lin
• Manufacturer: Freescale Semiconductor, Inc

Table 217. Port A Data Register (PTA)
Note:
Table 218. Port A Data Register Description
Functional Description and Application Information
4.27.3.1
147.
Freescale Semiconductor
Function
Address 0x0000
Reset
SPI
W
Field
R
PTA
PTA
PTA
PTA
PTA
PTA
5
4
3
2
1
0
Read: Anytime.
Write: Anytime.
Port A general purpose input/output data—Data Register
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 3 is associated with the SS signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 2 is associated with the SCK signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 1 is associated with the MOSI signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 0 is associated with the MISO signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
—
Port A Data Register (PTA)
7
0
0
—
6
0
0
PTA5
—
0
5
PTA4
—
0
4
Description
PTA3
SS
0
3
Port Integration Module (9S12I32PIMV1)
PTA2
SCK
0
2
Access: User read/write
MOSI
PTA1
0
1
MM912F634
MISO
PTA0
0
0
165
(147)