mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 84

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mc9s12q128

Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 2 Port Integration Module (PIM9C32) Block Description
2.3.2.2
2.3.2.2.1
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
The SCI port associated with transmit pin 1 is configured as output if the transmitter is enabled and the
SCI pin associated with receive pin 0 is configured as input if the receiver is enabled. Please refer to SCI
Block User Guide for details.
2.3.2.2.2
Read: Anytime.
Write: Never, writes to this register have no effect.
84
Module Base + 0x0008
Module Base + 0x0009
PTIS[3:0]
Reset
Reset
Field
3–0
SCI
W
W
R
R
Port S Input Register — This register always reads back the status of the associated pins. This also can be
used to detect overload or short circuit conditions on output pins.
Port S Registers
0
0
0
0
7
7
Port S I/O Register (PTS)
Port S Input Register (PTIS)
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 2-11. Port S Input Register (PTIS)
Figure 2-10. Port S I/O Register (PTS)
Table 2-10. PTIS Field Descriptions
0
0
0
0
5
5
MC9S12Q128
Rev 1.09
0
0
0
0
4
4
Description
PTIS3
PTS3
0
0
3
3
PTIS2
PTS2
0
0
2
2
Freescale Semiconductor
PTIS1
PTS1
TXD
0
0
1
1
PTIS0
PTS0
RXD
0
0
0
0

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