mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 321

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mc9s12q128

Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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10.3.3.3
This register keeps the data length field of the CAN frame.
10.3.3.4
This register defines the local priority of the associated message buffer. The local priority is used for the
internal prioritization process of the MSCAN and is defined to be highest for the smallest binary number.
The MSCAN implements the following internal prioritization mechanisms:
Freescale Semiconductor
Module Base + 0x00XB
DLC[3:0]
Field
3:0
Reset:
All transmission buffers with a cleared TXEx flag participate in the prioritization immediately
before the SOF (start of frame) is sent.
The transmission buffer with the lowest local priority field wins the prioritization.
W
R
Data Length Code Bits — The data length code contains the number of bytes (data byte count) of the respective
message. During the transmission of a remote frame, the data length code is transmitted as programmed while
the number of transmitted data bytes is always 0. The data byte count ranges from 0 to 8 for a data frame.
Table 10-32
Data Length Register (DLR)
Transmit Buffer Priority Register (TBPR)
Figure 10-34. Data Length Register (DLR) — Extended Identifier Mapping
7
x
DLC3
0
0
0
0
0
0
0
0
1
shows the effect of setting the DLC bits.
= Unused; always read “x”
6
x
Table 10-31. DLR Register Field Descriptions
DLC2
0
0
0
0
1
1
1
1
0
Table 10-32. Data Length Codes
Data Length Code
5
x
MC9S12Q128
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 1.09
DLC1
4
x
0
0
1
1
0
0
1
1
0
Description
DLC3
x
3
DLC0
0
1
0
1
0
1
0
1
0
DLC2
2
x
Data Byte
Count
DLC1
0
1
2
3
4
5
6
7
8
x
1
DLC0
0
x
321

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