mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 118

• Manufacturer Part Number: mc9s12q128
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 3 Module Mapping Control (MMCV4) Block Description
3.3.2.7
Read: Anytime
Write: Writes have no effect
Reset: Defined at chip integration, see device overview section.
The MEMSIZ0 register reflects the state of the register, EEPROM and RAM memory space configuration
switches at the core boundary which are configured at system integration. This register allows read
visibility to the state of these switches.
118
Module Base + 0x001C
Starting address location affected by INITRG register setting.
RAM_SW[2:0]
EEP_SW[1:0]
REG_SW0
Reset
ram_sw2:ram_sw0
Field
5:4
W
7
2
R REG_SW0
000
001
010
Memory Size Register 0 (MEMSIZ0)
—
Allocated System Register Space
0 Allocated system register space size is 1K byte
1 Allocated system register space size is 2K byte
Allocated System EEPROM Memory Space — The allocated system EEPROM memory space size is as
given in
Allocated System RAM Memory Space — The allocated system RAM memory space size is as given in
Table
7
3-9.
= Unimplemented or Reserved
Table
eep_sw1:eep_sw0
—
3-8.
0
6
RAM Space
Allocated
2K bytes
4K bytes
6K bytes
Figure 3-9. Memory Size Register 0 (MEMSIZ0)
Table 3-8. Allocated EEPROM Memory Space
00
01
10
11
Table 3-9. Allocated RAM Memory Space
Table 3-7. MEMSIZ0 Field Descriptions
EEP_SW1
—
5
Mappable Region
EEP_SW0
MC9S12Q128
8K bytes
Rev 1.09
2K bytes
4K bytes
—
4
RAM
Description
Allocated EEPROM Space
(2)
—
0
3
2K bytes
4K bytes
8K bytes
0K byte
RAM[15:11]
RAM[15:12]
RAM[15:13]
Bits Used
RAM_SW2
INITRM
—
2
RAM_SW1
Freescale Semiconductor
—
1
Base Address
RAM Reset
0x0800
0x0000
0x0800
RAM_SW0
—
0
(1)