lpc1778 NXP Semiconductors, lpc1778 Datasheet - Page 55

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lpc1778

Manufacturer Part Number
lpc1778
Description
32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 96 Kb Sram; Usb Device/host/otg; Ethernet; Lcd; Emc
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC178x_7x
Objective data sheet
7.17.1 Features
7.18.1 Features
7.17 Fast general purpose parallel I/O
7.18 12-bit ADC
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back as well as the current state of the port pins.
LPC178x/7x use accelerated GPIO functions:
Additionally, any pin on Port 0 and Port 2 providing a digital function can be programmed
to generate an interrupt on a rising edge, a falling edge, or both. The edge detection is
asynchronous, so it may operate when clocks are not present such as during Power-down
mode. Each enabled interrupt can be used to wake up the chip from Power-down mode.
The LPC178x/7x contain one ADC. It is a single 12-bit successive approximation ADC
with eight channels and DMA support.
Can be used as a multimedia card bus or a secure digital memory card bus host. The
SD/MMC can be connected to several multimedia cards or a single secure digital
memory card.
DMA supported through the GPDMA controller.
GPIO registers are accessed through the AHB multilayer bus so that the fastest
possible I/O timing can be achieved.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All GPIO registers are byte and half-word addressable.
Entire port value can be written in one instruction.
Support for Cortex-M3 bit banding.
Support for use with the GPDMA controller.
Bit level set and clear registers allow a single instruction to set or clear any number of
bits in one port.
Direction control of individual bits.
All I/O default to inputs after reset.
Pull-up/pull-down resistor configuration and open-drain configuration can be
programmed through the pin connect block for each GPIO pin.
12-bit successive approximation ADC.
Input multiplexing among eight pins.
Power-down mode.
Measurement range V
12-bit conversion rate: up to 400 kHz.
All information provided in this document is subject to legal disclaimers.
Rev. 00.04 — 8 July 2010
SS
to VREFP.
32-bit ARM Cortex-M3 microcontroller
LPC178x/7x
© NXP B.V. 2010. All rights reserved.
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