lpc1778 NXP Semiconductors, lpc1778 Datasheet - Page 44

• Manufacturer Part Number: lpc1778
• Description: 32-bit Arm Cortex-m3 Microcontroller; Up To 512 Kb Flash And 96 Kb Sram; Usb Device/host/otg; Ethernet; Lcd; Emc
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 6.
LPC178x_7x
Objective data sheet
Address range
0x0000 0000 to
0x1FFF FFFF
LPC178x/177x memory usage and details
7.3 On-chip flash program memory
7.4 EEPROM
7.5 On-chip SRAM
7.6 Memory Protection Unit (MPU)
7.7 Memory map
General Use
On-chip non-volatile
memory
On-chip SRAM
Boot ROM
The LPC178x/7x contain up to 512 kB of on-chip flash program memory. A new two-port
flash accelerator maximizes performance for use with the two fast AHB-Lite buses.
The LPC178x/7x contains up to 4 kB of on-chip byte-erasable and byte-programmable
EEPROM data memory.
The LPC178x/7x contain a total of up to 96 kB on-chip static RAM data memory. This
includes the main 64 kB SRAM, accessible by the CPU and DMA controller on a
higher-speed bus, and up to two additional 16 kB each SRAM blocks situated on a
separate slave port on the AHB multilayer matrix.
This architecture allows CPU and DMA accesses to be spread over three separate RAMs
that can be accessed simultaneously.
The LPC178x/7x have a Memory Protection Unit (MPU) which can be used to improve the
reliability of an embedded system by protecting critical data within the user application.
The MPU allows separating processing tasks by disallowing access to each other's data,
disabling access to memory regions, allowing memory regions to be defined as read-only
and detecting unexpected memory accesses that could potentially break the system.
The MPU separates the memory into distinct regions and implements protection by
preventing disallowed accesses. The MPU supports up to eight regions each of which can
be divided into eight subregions. Accesses to memory locations that are not defined in the
MPU regions, or not permitted by the region setting, will cause the Memory Management
Fault exception to take place.
All information provided in this document is subject to legal disclaimers.
Address range details and description
0x0000 0000 - 0x0007 FFFF
0x0000 0000 - 0x0003 FFFF
0x0000 0000 - 0x0001 FFFF
0x0000 0000 - 0x0000 FFFF
0x1000 0000 - 0x1000 FFFF
0x1000 0000 - 0x1000 7FFF
0x1000 0000 - 0x1000 3FFF
0x1FFF 0000 - 0x1FFF 1FFF
Rev. 00.04 — 8 July 2010
For devices with 512 kB of flash memory.
For devices with 256 kB of flash memory.
For devices with 128 kB of flash memory.
For devices with 64 kB of flash memory.
For devices with 64 kB of local SRAM.
For devices with 32 kB of local SRAM.
For devices with 16 kB of local SRAM.
8 kB Boot ROM with flash services.
32-bit ARM Cortex-M3 microcontroller
LPC178x/7x
© NXP B.V. 2010. All rights reserved.
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