at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 58

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at90pwm81-16se

Manufacturer Part Number
at90pwm81-16se
Description
8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
8.4.1
58
AT90PWM81
Watchdog Timer Control Register - WDTCSR
Note:
Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change in the
WDP bits can result in a time-out when switching to a shorter time-out period;
• Bit 7 - WDIF: Watchdog Interrupt Flag
This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is configured for
interrupt. WDIF is cleared by hardware when executing the corresponding interrupt handling vector.
Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in SREG and WDIE are
set, the Watchdog Time-out Interrupt is executed.
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCSR
ori
sts WDTCSR, r16
; --
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCSR, r16
; --
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
__enable_interrupt();
1. The example code assumes that the part specific header file is included.
7
WDIF
R/W
0
r16, (1<<WDCE) | (1<<WDE)
Got four cycles to set the new values from here -
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
Finished setting new values, used 2 cycles -
(1)
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
6
WDIE
R/W
0
(1)
equence */
5
WDP3
R/W
0
4
WDCE
R/W
0
3
WDE
R/W
X
2
WDP2
R/W
0
1
WDP1
R/W
0
0
WDP0
R/W
0
7734M–AVR–03/10
WDTCSR

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