at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 210

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

18.6.1
210
AT90PWM81
Analog Input Circuitry
Another possible procedure is possible for Auto trigger conversions:
Note that the ADC will not be automatically turned off when entering other sleep modes than Idle mode
and ADC Noise Reduction mode. The user is advised to write zero to ADEN before entering such sleep
modes to avoid excessive power consumption.
If the ADC is enabled in such sleep modes and the user wants to perform differential conversions, the user
is advised to switch the ADC off and on after waking up from sleep to prompt an extended conversion to
get a valid result.
The analog input circuitry for single ended channels is illustrated in Figure 18-8 An analog source applied
to ADCn is subjected to the pin capacitance and input leakage of that pin, regardless of whether that chan-
nel is selected as input for the ADC. When the channel is selected, the source must drive the S/H capacitor
through the series resistance (combined resistance in the input path).
The ADC is optimized for analog signals with an output impedance of approximately 5 kΩ or less. If such
a source is used, the sampling time will be negligible. If a source with higher impedance is used, the sam-
pling time will depend on how long time the source needs to charge the S/H capacitor, witch can vary
widely. The user is recommended to only use low impedant sources with slowly varying signals, since this
minimizes the required charge transfer to the S/H capacitor.
If differential gain channels are used, the input circuitry looks somewhat different, although source imped-
ances of a few hundred kΩ or less is recommended.
Signal components higher than the Nyquist frequency (f
channels, to avoid distortion from unpredictable signal convolution. The user is advised to remove high
frequency components with a low-pass filter before applying the signals as inputs to the ADC.
a.
b.
c.
d.
e.
a.
b.
c.
d.
Make sure the ADNCDIS bit is reset
Make sure the ADATE bit is reset
Make sure that the ADC is enabled and is not busy converting (ADSC reset). Single Con-
version mode must be selected and the ADC conversion complete interrupt must be
enabled.
Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once
the CPU has been halted.
If no other interrupts occur before the ADC conversion completes, the ADC interrupt will
wake up the CPU and execute the ADC Conversion Complete interrupt routine. If another
interrupt wakes up the CPU before the ADC conversion is complete, that interrupt will be
executed, and an ADC Conversion Complete interrupt request will be generated when the
ADC conversion completes. The CPU will remain in active mode until a new sleep com-
mand is executed.
Make sure the ADNCDIS bit is set
Make sure the ADATE bit is set
Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion on the
next triggering event.
If no other interrupts occur before the ADC conversion completes, the ADC interrupt will
wake up the CPU and execute the ADC Conversion Complete interrupt routine. If another
interrupt wakes up the CPU before the ADC conversion is complete, that interrupt will be
executed, and an ADC Conversion Complete interrupt request will be generated when the
ADC conversion completes. The CPU will remain in active mode until a new sleep com-
mand is executed.
ADC
/2) should not be present for either kind of
7734M–AVR–03/10