tza3017hw NXP Semiconductors, tza3017hw Datasheet - Page 32

• Manufacturer Part Number: tza3017hw
• Description: 30 Mbits/s Up To 3.2 Gbits/s A-rate Fibre Optic Transmitter
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 27 Register MUXTIMING (address FDH); default value 80H
TZA3017HW FEATURES IN PRE-PROGRAMMED
MODE
Although the TZA3017HW is primarily intended to be
programmed via the I
functions can be accessed either via the I
control mode (pin UI HIGH), or via the external chip pins in
pre-programmed mode (pin UI LOW). The TZA3017HW
functions that are accessible in pre-programmed mode
and their control pins are as follows:
2003 May 14
Choice of four pre-programmed SDH/SONET bit rates:
STM1/OC3, STM4/OC12, STM16/OC48,
STM16/OC48
Choice of four pre-programmed bit rates: Fibre Channel,
double Fibre Channel, Gigabit Ethernet, 10-Gigabit
Ethernet; pins DR0 to DR2
Choice of four multiplexing ratios: 16:1, 10:1, 8:1 or 4:1:
pins MUXR1 and MUXR0
30 Mbits/s up to 3.2 Gbits/s
A-rate fibre optic transmitter
7
0
0
0
6
0
0
0
5
0
0
0
FEC; pins DR0 to DR2
2
4
0
0
0
C-bus, many of the TZA3017HW
BIT
3
0
1
1
2
1
0
0
2
C-bus in I
1
0
0
0
0
0
0
0
2
C-bus
multiplexing ratio 10:1 maximum bit rate
default value
up to 3.2 Gbits/s
up to 2.7 Gbits/s
32
Co-directional or contra-directional clocking scheme:
pin CLKDIR
Loop mode serial input and output configuration:
pins ENLINQ and ENLOUTQ
Even/odd parity checking: pin PAREVEN
LVPECL outputs on parallel interface with 800 mV (p-p),
single-ended signal, (DC-coupled termination to
V
CML serial RF outputs with typical 280 mV (p-p),
single-ended signal, (DC-coupled load)
Loss Of Lock indication (LOL)
FIFO overflow indication
FIFO reset
High junction temperature indication (pin INT;
open-drain)
18 to 21 MHz reference frequency supported.
CC
DESCRIPTION
2 V)
PARAMETER
MUX_TIMING
TZA3017HW
Product specification
NAME