tza3017hw NXP Semiconductors, tza3017hw Datasheet - Page 13

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tza3017hw

Manufacturer Part Number
tza3017hw
Description
30 Mbits/s Up To 3.2 Gbits/s A-rate Fibre Optic Transmitter
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
When contra-directional clocking is selected, any incoming
clock at pins PICLK and PICLKQ is not used.
In contra-directional clocking mode, the incoming data on
the parallel data bus is sampled by the internally generated
parallel output clock. In this mode, the parallel data source
must be clocked using the parallel output clock signal at
pins POCLK and POCLKQ. To avoid timing problems, the
clock signal at pins POCLK and POCLKQ can be phase
shifted with respect to the internal clock in four 90 degree
steps, controlled by bits POCLKINV and POPHASE in
I
2003 May 14
2
handbook, full pagewidth
C-bus register MUXCNF1 (address A1H); see Table 7.
30 Mbits/s up to 3.2 Gbits/s
A-rate fibre optic transmitter
FRAMER
TX_CLK_SRC
TX_PARITY
TX_DATA
TX_CLK
Fig.7 Co-directional clocking.
13
Table 7 Truth table for bits POCLKINV and POPHASE
16
16
POCLKINV
PARITY
PARITYQ
D00 to D15
D00Q to D15Q
PICLK
PICLKQ
POCLK
POCLKQ
FIFORESET CREF
0
0
1
1
in I
TZA3017HW
2
C-bus register MUXCNF1
system
clock
POPHASE
MGW565
0
1
0
1
TZA3017HW
Product specification
PHASE SHIFT
180
270
90
0

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