tza3017hw NXP Semiconductors, tza3017hw Datasheet - Page 20

• Manufacturer Part Number: tza3017hw
• Description: 30 Mbits/s Up To 3.2 Gbits/s A-rate Fibre Optic Transmitter
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Acknowledge
Refer to Fig.14. Only one data byte is transferred between
the start and stop conditions during a write from the
transmitter to the receiver. Each byte of eight bits is
followed by an acknowledge bit. The acknowledge bit is a
HIGH level signal put on the bus by the transmitter during
which time the master generates an extra acknowledge
related clock pulse. A slave receiver which is addressed
must generate an acknowledge after the reception of each
byte. Also a master receiver must generate an
acknowledge after the reception of each byte that has
been clocked out of the slave transmitter.
2003 May 14
handbook, full pagewidth
30 Mbits/s up to 3.2 Gbits/s
A-rate fibre optic transmitter
BY TRANSMITTER
DATA OUTPUT
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
condition
START
S
Fig.14 Acknowledgment on the I
1
20
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end-of-data to the transmitter by not generating
an acknowledge on the last byte that has been clocked
out of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition; see Fig.17.
2
2
C-bus.
not acknowledge
acknowledge
8
acknowledgement
clock pulse for
9
MBC602
TZA3017HW
Product specification