hyb18t512160afl-3.7 Infineon Technologies Corporation, hyb18t512160afl-3.7 Datasheet - Page 94

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hyb18t512160afl-3.7

Manufacturer Part Number
hyb18t512160afl-3.7
Description
512-mbit Ddr2 Sdram
Manufacturer
Infineon Technologies Corporation
Datasheet
6.1.1
The ODT function adds additional current consumption
to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A6 & A2 in the EMRS(1) a
full or reduced termination can be selected. The current
Table 49
ODT Current
Enabled ODT current per DQadded
current for ODT enabled;
ODT is HIGH; Data Bus inputs are floating
Active ODT current per DQadded
for ODT enabled;
ODT is HIGH; worst case of Data Bus inputs are
stable or switching.
Note: For power consumption calculations the ODT duty cycle has to be taken into account
Data Sheet
On Die Termination (ODT) Current
ODT current per terminated input pin
I
DDQ
I
DDQ
current
I
I
ODTO
ODTT
Currents Measurement Specifications and Conditions
95
consumption for any terminated input pin depends on
whether the input pin is in tri-state or driving “0” or “1”,
as long a ODT is enabled during a given period of time..
See
EMRS(1) State
A6 = 0, A2 = 1
A6 = 1, A2 = 0
A6 = 1, A2 = 1
A6 = 0, A2 = 1
A6 = 1, A2 = 0
A6 = 1, A2 = 0
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
Table 49
Min.
5
2.5
7.5
10
5
15
512-Mbit DDR2 SDRAM
Typ.
6
3
9
12
6
18
09112003-SDM9-IQ3P
Max.
7.5
3.75
11.25
15
7.5
22.5
Rev. 1.6, 2005-08
Unit
mA/DQ
mA/DQ
mA/DQ
mA/DQ
mA/DQ
mA/DQ

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