z86131 ZiLOG Semiconductor, z86131 Datasheet - Page 34

• Manufacturer Part Number: z86131
• Description: Ntsc Line 21 Decoder
• Manufacturer: ZiLOG Semiconductor

Z86129/130/131
NTSC Line 21 Decoder
INTERNAL REGISTERS (Continued)
Note: OSD and XDS display modes always have Enhanced At-
D
and XDS display modes: High = DROP SHADOW and
Low = BOX. The default is High.
D
in the OSD and XDS display modes: High = 15 lines/row
and Low = 13 lines/row. The default is High.
H Position Register Address = 02h
D0ÐD5Ðh0Ðh5
display. The default value in this register is 26h. Each count
change represents an incremental timing change of 330 ns.
Decreasing the value of this field moves the display to the
RIGHT. Conversely, increasing the value of this field
moves the display to the LEFT.
D
signal when in the EXT HLK mode: Low = Rising Edge,
High = Falling Edge. The default is Low.
D
and Low = Black Box. The default is Low.
Text Position Register Address = 03h
D
play. The default is 15 rows.
D
The default value in this register is set to FFh, which pro-
duces a 15-row display with base row 15. Entering a new
value in this register can alter the size and placement of the
TEXT display. For example, to produce an 8 row TEXT dis-
play with a base row of 12, this register should be set to C8h.
34
Bit
Bit
6
7
6
7
0
4
Figure 25. Text Position Register (Address = 03h)
ÐODRP.
ÐO15.
ÐHPO.
ÐBLUBX.
ÐD
ÐD
Figure 24. H Position Register (Address = 02h)
BLUBX HPO
R/W
R/W
D
3
7
y
D
Ðx
Ðy
tributes enabled.
7
3
7
0
0
Selects the number of TV lines per character row
Set the polarity to be used for locking to the HIN
Ðx
Ðy
R/W
R/W
Selects Drop Shadow or Full Box in the OSD
D
y
3
3
D
Designates color of BOX: High = Blue Box
6
2
.
.
6
. Used to set the Horizontal Timing of the
Sets the Number Of Rows in the TEXT dis-
Sets the Base Row of the TEXT display.
R/W
R/W
D
y
D
h
1
5
5
5
R/W
R/W
D
y
D
h
0
4
4
4
R/W
R/W
D
D
x
h
3
3
3
3
R/W
R/W
D
x
D
h
2
2
2
2
R/W
R/W
D
D
x
h
1
1
1
1
P R E L I M I N A R Y
R/W
R/W
D
D
x
h
0
0
0
0
If the value of the
rows are off the top of the screen, then the first row of the
TEXT display starts in row 1 and have the number of rows
determined by the
Line 21 Activity Register Address = 04h
D
nel selected for display, and becomes inactive if no data is
received for the selected channel within the previous 16 sec-
onds: High = Active, Low = Inactive. The reset state is Low.
D
comes inactive if no XDS data is received within the pre-
vious 16 seconds: High = Active, Low = Inactive. The reset
state is Low.
D
XDS Filter Register Address = 05h
D
through the Serial Control port when XDS recovery has
been enabled.
D
the Serial Control port when XDS recovery has been en-
abled.
D
output through the Serial Control port when XDS recovery
has been enabled.
D
through the Serial Control port when XDS recovery has
been enabled.
D
through the Serial Control port when XDS recovery has
been enabled.
Figure 26. Line 21 Activity Register (Address = 04h)
Bit
Bit
0
1
2
0
1
2
3
4
ÐPUBL.
ÐSCH.
ÐXDS.
ÐD
ÐCURR.
ÐFUTR.
ÐCHAN.
ÐMISC.
Figure 27. XDS Filter Register (Address = 05h)
R/W
7
D
res
D
s
Ðres.
2
7
7
Indicates XDS data is being processed, and be-
Indicates data being processed in the Data Chan-
Selects Miscellaneous Class packets for output
Selects Future Class packets for output through
Selects Public Service Class packets for output
R/W
Selects Current Class packets for output
Selects Channel Information Class packets for
D
D
res
Reserved.
s
6
6
1
x
R/W
and
x
D
res
D
s
0
value.
5
5
y
bits result in a display where TEXT
PUBL
R/W
D
D
res
4
4
MISC CHAN FUTR CURR
R/W
D
res
D
3
3
DS007200-TVX0199
R/W
D
D
res
2
2
XDS
R/W
D
D
R
1
1
ZiLOG
SCH
R/W
D
R
D
0
0