z86131 ZiLOG Semiconductor, z86131 Datasheet - Page 28

• Manufacturer Part Number: z86131
• Description: Ntsc Line 21 Decoder
• Manufacturer: ZiLOG Semiconductor

Z86129/130/131
NTSC Line 21 Decoder
SERIAL COMMUNICATIONS INTERFACE (Continued)
bytes. The serial status is clocked out during the write of
the READ1 or READ2 command. The data byte or bytes
are then clocked-out in sequence, MSB first, while NOP
commands are written into the device. Data bits are clocked-
out on the rising edge of SCK. All available data bytes must
be read to clear the DAV bit and permit subsequent reads.
The SPI Bus Protocol
1. The first bit of the first output byte is driven out on
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SDO following the rising edge of SCK on the most re-
cent bit (LSB) of the READ1 or READ2 command.
P R E L I M I N A R Y
2. Three-wire bus with Clock signal on SCK pin, Serial
3. SEN pin Low disabled the port, placing SDO in tri-
4. SEN pin High enables the port for operation.
5. SEN and SMS pins Low is a hardware reset for the
6. Serial synchronization can be established by clocking
Data Input on SDA pin and Serial Data Output on
SDO pin.
state. Signal transitions on SCK and SDA are ignored.
part. These pins must be held Low for at least 100 ns.
in the minimum required SSR string of FFh, FFh, FEh.
More than two bytes of FFh may be input but the string
must end with FEh.
DS007200-TVX0199
ZiLOG