psb21391 Infineon Technologies Corporation, psb21391 Datasheet - Page 232

• Manufacturer Part Number: psb21391
• Description: Siemens Codec With Upn Transceiver
• Manufacturer: Infineon Technologies Corporation

Data Sheet
CRAM Status Register (CSR)
Value after reset: 00
CCR
DCA
Read-back of the programmed value
BSYB
0: Momentary there is no transfer of CRAM data to the temporary area running. CRAM
1: Transfer of the CRAM block <CBADR> is running. CRAM access via microcontroller
CBADR
Read-back of the programmed value
CRAM Control Register (CCR)
Value after reset: 00
CCR
DCA
0: The normal CRAM area (80
1: The temporary CRAM area (coefficient block with 8 bytes corresponding to the
SBP
0: No back-up is initiated
1: A transition to SBP = ’1’ starts the back-up of the CRAM block <CBADR> into the
CBADR
Address of a coefficient block with 8 bytes corresponding to the COP_x sequences
(x=0...F) of the codec programming sequences
access via microcontroller interface is possible
interface is not allowed
COP_x sequences) is accessed by the codec DSP. The switching to the temporary
CRAM block happens as soon as the transfer of the block has completed (BSYB = ’0’)
temporary CRAM area
7
7
0
0
... DSP CRAM Access
... Busy Back-up Procedure
... CRAM Block Address
... DSP CRAM Access
... Start Back-up Procedure
... CRAM Block Address
H
H
0
0
DCA BSYB
DCA
H
tp FF
SBP
H
) is accessed by the codec DSP
222
CBADR
CBADR
Detalled Register Description
0
0
PSB 21391
PSB 21393
2001-03-07
WR (6F
RD (6F
H
H
)
)