psb21391 Infineon Technologies Corporation, psb21391 Datasheet - Page 231

• Manufacturer Part Number: psb21391
• Description: Siemens Codec With Upn Transceiver
• Manufacturer: Infineon Technologies Corporation

MPx
7.3.12
Value after reset: 00
TFCR
7.3.13
The programming of the CRAM Control Register (CCR) and the CRAM Status Register
(CSR) is intended for a back-up procedure for the direct access to individual CRAM
coefficients. A detailed description can be found in chapter 4.8.2.1.
Data Sheet
ALTF
DLTF
7
Bit 1 0
0
0
1
1
Test Function Configuration Register (TFCR)
Bit 5 4
0
0
0
0
1
Bit 2 1
0
0
0
0
1
1
1
CRAM Control (CCR) and Status (CSR) Register
0
... Mask Position of Channel x
... Analog Loop and Test Functions
... Digital Loop and Test Functions
0
1
0
1
0
0
1
1
X
0
0
1
1
0
0
1
H
0
Description
Bit 5...0 of the codec data register CHx0 is masked with MASKx
Bit 7...2 of the codec data register CHx0 is masked with MASKx
Bit 5...0 of the codec data register CHx1 is masked with MASKx
Bit 7...2 of the codec data register CHx1 is masked with MASKx
3
0
1
0
1
X
0
0
1
0
1
0
1
X
Test Function
NOT: No Test Mode
ALF:
ALC:
ALN:
Reserved
Test Function
NOT: No Test Mode
IDR:
DLN:
DLS:
DLP1: Digital Loop via codec part CH1
DLP2: Digital Loop via codec part CH2
Reserved
ALTF
Analog Loop via Front End
Analog Loop via Converter
Analog Loop via Noise Shaper
Initialize DRAM
Digital Loop via Noise Shaper
Digital Loop via Signal Processor
221
Detalled Register Description
DLTF
0
RD/WR (6C
PSB 21391
PSB 21393
2001-03-07
H
)