psb21391 Infineon Technologies Corporation, psb21391 Datasheet - Page 105

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psb21391

Manufacturer Part Number
psb21391
Description
Siemens Codec With Upn Transceiver
Manufacturer
Infineon Technologies Corporation
Datasheet

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The HDLC controller indicates to the host that a new data block can be read from the
RFIFO by means of an RPF interrupt (see previous chapter). User data is stored in the
RFIFO and information about the received frame is available in the RSTA, RBCL and
RBCH registers which are listed in table 8.
Table 8
Receive Information at RME Interrupt
Information
Type of frame
(Command/
Response)
Recognition of SAPI
Recognition of TEI
Result of CRC check
(correct/incorrect)
Valid Frame
Abort condition detected
(yes/no)
Data overflow during reception of
a frame (yes/no)
Number of bytes received in
RFIFO
Message length
RFIFO Overflow
Data Sheet
Location
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RBCL Reg.
RBCL Reg.
RBCH Reg.
RBCH Reg.
95
C/R
SA1, 0
TA
CRC
VFR
RAB
RDO
RBC4-0
RBC11-0
OV
Bit
Mode
Non-auto mode,
2-byte address field
Transparent mode 1
Non-auto mode,
2-byte address field
Transparent mode 1
All except
transparent mode 0
All
All
All
All
All
All
All
HDLC Controller
PSB 21391
PSB 21393
2001-03-07

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