psb21391 Infineon Technologies Corporation, psb21391 Datasheet - Page 196

• Manufacturer Part Number: psb21391
• Description: Siemens Codec With Upn Transceiver
• Manufacturer: Infineon Technologies Corporation

Data Sheet
7.1
7.1.1
Value after reset: 00
TR_
CONF0
DIS_TR
0: All layer-1 functions are enabled.
1: All layer-1 functions are disabled. The HDLC controller and codec part can still
TCM
0: T-channel data downstream (U
1: T-channel data downstream (U
L1SW
0: Layer 1 state machine of the SCOUT is used
1: Layer 1 state machine is disabled. The functionality can be realized in software.
LDD
0: Clock generation after detection of any signal on the line in the power down state
1: No clock generation after detection of any signal on the line in the power down state
Note: If an interrupt is generated by the internal level detect circuitry, the microcontroller
operate via IOM-2. DCL and FSC pins become input.
S/G-bit (S/G = inverted T-bit)
The commands can be written in register TR_CMD and the status read from
the TR_STA.
has to set this bit to ’0’ for an activation of the line interface.
Transceiver, Interrupt and General Configuration Registers
TR_CONF0 - Transceiver Configuration Register
7
DIS_
TR
... Disable Transceiver
... T-Channel Mapping
... Enable Layer 1 State Machine in Software
... Level Detection Discard
H
0
0
PN
PN
TCM L1SW
--> IOM-2) is mapped onto the
--> IOM-2) is mapped onto the A/B-bit (A/B = T)
186
0
Detalled Register Description
0
0
LDD RD/WR (30
PSB 21391
PSB 21393
2001-03-07
H
)