psb21391 Infineon Technologies Corporation, psb21391 Datasheet - Page 111

• Manufacturer Part Number: psb21391
• Description: Siemens Codec With Upn Transceiver
• Manufacturer: Infineon Technologies Corporation

3.3.2
The transmission of transparent frames (XTF command) is shown in figure 56.
For transparent frames, the whole frame including address and control field must be
written to the XFIFO. The host configures whether the CRC is generated and appended
to the frame (default) or not (selected in EXMR.XCRC).
Furthermore, the host selects the interframe time fill signal which is transmitted between
HDLC frames (EXMR:ITF). One option is to send continuous flags (’01111110’),
however if D-channel access handling is required, the signal must be set to idle
(continuous ’1’s are transmitted).
Figure 56
Transmit Data Flow
3.4
By setting the enable HDLC data bits (EN_D, EN_B1H, EN_B2H) in the HCI_CR register
the HDLC controller can access the D, B1, B2 channels or the combination of them (e.g.
18 bit IDSL data (2B+D)). In all modes sending works always frame aligned, i.e. it starts
with the first selected channel whereas reception looks for a flag anywhere in the serial
data stream.
Data Sheet

Transmit Frame Structure
Access to IOM Channels
FLAG
ADDR
101
CTRL
I
CRC

HDLC Controller
fifoflow_tran.vsd
PSB 21391
PSB 21393
FLAG
2001-03-07