m66291 Renesas Electronics Corporation., m66291 Datasheet - Page 62

• Manufacturer Part Number: m66291
• Description: Assp Usb2.0 Device Controller
• Manufacturer: Renesas Electronics Corporation.

M 6 6 2 9 1 G P / H P
R e v 1 . 0 1
(2) SCLR (Buffer Clear) Bit (b12)
(3) Sreq (SIE_FIFO Ready) Bit (b11)
(4) SIE_DTLN (SIE_FIFO Receive Data Length) Bits (b10~b0)
This bit is valid against the endpoint set to the IN buffer (EPi_DIR bit = “1”). Do not write “1” when set to the
OUT buffer (EPi_DIR bit = “0”)
The SIE side buffer is cleared by writing “1” to this bit.
This bit indicates to enable/disable of writing to the TGL bit and SCLR bit.
When this bit is set to “1”, do not write to the TGL bit and SCLR bit.
These bits are valid against the endpoint set to the OUT buffer (EPi_DIR bit = “0”) and indicates the receive
data number (byte count) in the SIE side buffer (renewed after every ACK transmit).
2 0 0 4 . 1 1 . 0 1
Note:
Note:
Note:
Refer to “3.2 FIFO Buffer” for CPU/SIE side.
Make sure that the response PID is set to NAK (EPi_PID bits = “00”) and the Sreq bit to “0” before writing “1” to
this bit.
Refer to “3.2 FIFO Buffer” for CPU/SIE side.
p a g e 6 2 o f 1 2 2