com20020-5 Standard Microsystems Corp., com20020-5 Datasheet - Page 50
![no-image](/images/no-image-200.jpg)
com20020-5
Manufacturer Part Number
com20020-5
Description
Com20020-5 Ulanc Universal Local Area Network Controller With 2k X 8 On-board Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
1.COM20020-5.pdf
(58 pages)
- Current page: 50 of 58
- Download datasheet (253Kb)
nWR
A0-A2
nCS
D0-D7
FIGURE 13 - NON-MULTIPLEXED BUS, 80XX-LIKE CONTROL SIGNALS; WRITE
*
**nCS may become active after control becomes active, but the data setup time will now
Note 2: Any cycle occurring after a write to the Address Pointer Low Register
Note 1:
T is the Arbitration Clock Period.
T is identical to XTAL1 if SLOW ARB = 0,
T is twice XTAL1 period if SLOW ARB = 1
be 30 nS measured from the later of nCS falling or Valid Data available.
t1
t2
t3
t4
t5
t6
t7
The Microcontroller typically accesses the COM20020-5 on every other cycle.
requires a minimum of 4T from the trailing edge of nWR to the leading edge
of the next nWR.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020-5 cycles.
Cycle Time (nWR Low to Next Time Low)**
Address Setup to nWR Active
Address Hold from nWR Inactive
nCS Setup to nWR Active
nCS Hold from nWR Inactive
Valid Data Setup to nWR High
Data Hold from nWR High
Parameter
t1
t3
CYCLE
50
VALID
t5
VALID DATA
t6
min
4T*
30**
15
10
10
5
0
max
t7
t2
Note 2
t4
t5**
units
nS
nS
nS
nS
nS
nS
nS
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