com20020-5 Standard Microsystems Corp., com20020-5 Datasheet - Page 44
![no-image](/images/no-image-200.jpg)
com20020-5
Manufacturer Part Number
com20020-5
Description
Com20020-5 Ulanc Universal Local Area Network Controller With 2k X 8 On-board Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
1.COM20020-5.pdf
(58 pages)
- Current page: 44 of 58
- Download datasheet (253Kb)
FIGURE 10 - MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; READ CYCLE
AD0-AD2,
D3-D7
nCS
ALE
nDS
DIR
*
Note 1:
T is the Arbitration Clock Period.
T is identical to XTAL1 if SLOW ARB = 0,
T is twice XTAL1 period if SLOW ARB = 1
t10
t1
t2
t3
t4
t5
t6
t7
t8
t9
The Microcontroller typically accesses the COM20020-5 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020-5 cycles.
nDS High to Data High Impedance
Cycle Time (nDS Low to Next Time Low)
DIR Setup to nDS Active
DIR Hold from nDS Inactive
nCS Setup to ALE Low
nCS Hold from ALE Low
ALE Low to nDS Low
nDS Low to Valid Data
Address Setup to ALE Low
Address Hold from ALE Low
t1
t3
VALID
t2,
t4
Parameter
t5
t9
t6
44
VALID DATA
min
10
10
4T*
30
10
10
20
15
0
t8
max
40
20
t7
t10
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
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