peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 82

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

FI and HI interrupt indications caused by one descriptor will be generated into one
interrupt vector with ’HI’ and ’FI’ bit set.
Data Sheet
ERR is also generated if an already started DMA transfer is aborted by a receive DMA
reset (RDR) command.
transmit descriptor:
In transmit direction an ERR interrupt is generated if one of the following descriptor
settings is detected
- HOLD=’1’ and FE=’0’ (the already started transmit frame could not be finished)
- LTDA=FTDA and FE=’0’ (the already started transmit frame could not be finished)
- FE=’0’ and NO=’0’ (a packet of length 0 is supposed to be a ’frame’ with FE bit set)
The DMA controller will continue ’normal’ operation in case of an ERR event.
Nevertheless these cases may result in receive data overflows or transmit data
underruns.
82
DMA Controller and Central FIFOs
PEB 20534
PEF 20534
2000-05-30