peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 394

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Source ID
Bit field 18..0 of the SCC interrupt vector is a copy of the SCC Interrupt Status Register
ISR. The meaning of the bit field depends on the selected protocol mode (HDLC (H),
ASYNC (A), BISYNC (B)).
(For detailed information on Interrupt Status Register ISR refer to
Interrupt Status Register" on Page
000
001
010
011
100
101
110
111
2
2
2
2
2
2
2
2
Receive Channel 0 Interrupt Vector (IQSCC0RX)
Receive Channel 1 Interrupt Vector (IQSCC1RX)
Receive Channel 2 Interrupt Vector (IQSCC2RX)
Receive Channel 3 Interrupt Vector (IQSCC3RX)
Transmit Channel 0 Interrupt Vector (IQSCC0TX)
Transmit Channel 1 Interrupt Vector (IQSCC1TX)
Transmit Channel 2 Interrupt Vector (IQSCC2TX)
Transmit Channel 3 Interrupt Vector (IQSCC3TX)
342.)
394
Host Memory Organization
Table 87 "ISR:
PEB 20534
PEF 20534
2000-05-30