peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 168

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Table 23
Protocol
Engine:
HDLC/
SDLC
SM = ’00’
ASYNC
SM = ’11’
BISYNC
SM = ’10’
1)
All modes are discussed in details in this chapter.
Data Sheet
Register
CCR0
Setting:
Extended transparent is a fully bit-transparent transmit/reception mode which is treated as a sub-mode of the
HDLC/SDLC block.
Protocol Mode:
HDLC auto mode
HDLC non auto mode
HDLC address mode 1
HDLC address mode 0
PPP mode
Extended transparent mode
Asynchronous mode
Isochronous mode
Bisynchronous mode
Monosynchronous mode
Protocol Mode Overview
octet synchronous
bit synchronous
asynchronous
1)
168
16 bit
8 bit
16 bit
8 bit
Register CCR1 Setting:
bit fields
MDS, ADM
MDS = ’00’
ADM = ’1’
MDS = ’00’
ADM = ’0’
MDS = ’01’
ADM = ’1’
MDS = ’01’
ADM = ’0’
MDS = ’10’
ADM = ’1’
MDS = ’10’
ADM = ’0’
MDS=’10’
ADM=’0’
MDS = ’11’
ADM=’1’
Register CCR0 Setting
(bit BCR):
BCR = ’1’
BCR = ’0’
Register CCR1 Setting
(bit EBIM):
EBIM = ’1’
EBIM = ’0’
Detailed Protocol Description
bit field
PPPM
PPPM = ’00’
PPPM = ’10’
PPPM = ’11’
PPPM = ’01’
PPPM = ’00’
PEB 20534
PEF 20534
2000-05-30