peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 355

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peb20534h-52

Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet

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10.3.3.3 SSC Registers Description
Table 90
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Data Sheet
Bit 31
Bit 15
0
0
30
14
0
0
SSCCON: SSC Control Register
29
13
0
0
0
0
28
12
0
0
0
read/(write)
(Do not write in operating mode,
i.e. write access with SSCEN = ’1’.)
0000 0000
0380
written by CPU for control (configuration mode),
read by CPU for status information (operating mode)
evaluated/updated by DSCC4
27
11
H
0
0
SSC General Configuration And Status
26
10
0
0
H
25
9
0
0
24
(unused)
355
8
0
0
23
7
0
0
0
0
22
6
0
0
0
Detailed Register Description
21
5
0
0
0
20
0
0
4
0
19
0
0
3
SSCBM(3:0)
SSCBC(3:0)
18
0
0
2
PEB 20534
PEF 20534
2000-05-30
17
0
0
1
16
0
0
0

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