isp1505a NXP Semiconductors, isp1505a Datasheet - Page 27

• Manufacturer Part Number: isp1505a
• Description: Isp1505a; Isp1505c Ulpi Hi-speed Universal Serial Bus Host And Peripheral Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1505A_ISP1505C_1
Product data sheet
9.5.2.3 RxEvent encoding
Using and selecting the V
Table
V
interrupts in the USB Interrupt Enable Rising Edge and USB Interrupt Enable Falling Edge
registers.
The link can use the V
shows the recommended usage for typical applications.
Table 12.
Standard USB Host Controllers: For standard hosts, the system must be able to provide
500 mA on V
detect overcurrent conditions. If the external overcurrent detector provides a digital fault
signal, then the fault signal must be connected to the ISP1505 FAULT input pin, and the
link must do the following:
Standard USB Peripheral Controllers: Standard peripherals must be able to detect
when V
start and end of USB peripheral operations. Detection of A_VBUS_VLD and SESS_END
thresholds is not needed for standard peripherals.
OTG devices: The ISP1505 provides partial OTG support. A low-power OTG A-device
that supplies less than 100 mA on V
pin. The internal A_VBUS_VLD comparator can be used. If the OTG A-device provides
more than 100 mA on V
Host Controllers" applies. The OTG A-device also uses SESS_VLD to detect when an
OTG A-device is initiating V
When an OTG device is configured as an OTG B-device, SESS_VLD must be used to
detect when V
when V
pulsing SRP.
The RxEvent field of the RXCMD informs the link of information related packets received
on the USB bus. RxActive and RxError are defined in USB 2.0 Transceiver Macrocell
Interface (UTMI) Specification Ver. 1.05 . HostDisconnect is defined in UTMI+
Specification Rev. 1.0 . A short definition is also given in the following subsections.
Application
Standard host
Standard peripheral no
OTG A-device
OTG B-device
1. If the external overcurrent circuit has an active LOW fault or overcurrent indicator, set
2. Set the IND_PASSTHRU bit in the Interface Control register to logic 1.
3. Set the USE_EXT_VBUS_IND bit in the OTG Control register to logic 1.
BUS
the IND_COMPL bit in the Interface Control register to logic 1.
state. To receive the V
9. The ISP1505 will send an RXCMD to the link whenever there is a change in the
BUS
BUS
V
is at a sufficient level for operation. SESS_VLD must be enabled to detect the
has dropped to a LOW level, allowing the B-device to safely initiate V
BUS
BUS
BUS
indicators in RXCMD for typical applications
in the range of 4.75 V to 5.25 V. An external circuit must be used to
is at a sufficient level for operation. SESS_END must be used to detect
A_VBUS_VLD
yes
yes
no
Rev. 01 — 19 October 2006
BUS
BUS
state to monitor V
, an overcurrent detector must be used and "Standard USB
BUS
BUS
BUS
state updates, the link must first enable the corresponding
pulsing SRP.
state encoding:
BUS
can connect the V
SESS_VLD
no
yes
yes
yes
ULPI HS USB host and peripheral transceiver
BUS
ISP1505A; ISP1505C
and take appropriate action.
The V
BUS
BUS
state encoding is shown in
SESS_END
no
no
no
yes
power to the ISP1505 V
© NXP B.V. 2006. All rights reserved.
Table 12
BUS
27 of 78
BUS