isp1505a NXP Semiconductors, isp1505a Datasheet - Page 24

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isp1505a

Manufacturer Part Number
isp1505a
Description
Isp1505a; Isp1505c Ulpi Hi-speed Universal Serial Bus Host And Peripheral Transceiver
Manufacturer
NXP Semiconductors
Datasheet

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Table 8.
Table 9.
ISP1505A_ISP1505C_1
Product data sheet
Command
type name
Register
write
Register
read
DATA
1 to 0
3 to 2
5 to 4
6
7
Name
LINESTATE LINESTATE signals: For a definition of LINESTATE, see
V
RxEvent
reserved
ALT_INT
BUS
TXCMD byte format
RXCMD byte format
Command code
DATA[7:6]
10b
11b
state
9.5.2 RXCMD
Description and value
DATA0 — LINESTATE[0]
DATA1 — LINESTATE[1]
Encoded V
Value
00
01
10
11
Encoded USB event signals: For an explanation of RxEvent, see
Value
00
01
11
10
-
By default, this signal is not used and is not needed in typical designs. Optionally, the link can
enable the BVALID_RISE and/or BVALID_FALL bits in the Power Control register. Corresponding
changes in BVALID will cause an RXCMD to be sent to the link with the ALT_INT bit asserted.
The ISP1505 communicates status information to the link by asserting DIR and sending
an RXCMD byte on the DATA bus. The RXCMD data byte format is given in
The ISP1505 will automatically send an RXCMD whenever there is a change in any of the
RXCMD data fields. The link must be able to accept an RXCMD at any time; including
single RXCMDs, back-to-back RXCMDs, and RXCMDs at any time during USB receive
packets when NXT is LOW. An example is shown in
refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1 .
An RXCMD may not be sent when exiting low-power mode or serial mode, if the interrupt
condition is removed before exiting.
Command
payload DATA[5:0]
10 1111b
XX XXXXb
10 1111b
XX XXXXb
V
V
V
V
V
RxActive
0
1
1
X
…continued
BUS
BUS
B_SESS_END
B_SESS_VLD
BUS
BUS
< V
voltage
voltage state: For an explanation of the V
V
B_SESS_END
A_VBUS_VLD
V
V
BUS
Rev. 01 — 19 October 2006
BUS
< V
< V
Command
name
EXTW
REGW
EXTR
REGR
A_VBUS_VLD
B_SESS_VLD
Command description
Extended register write command (optional). The 8-bit
address must be provided after the command is
accepted.
Register write command with 6-bit immediate address.
Extended register read command (optional). The 8-bit
address must be provided after the command is
accepted.
Register read command with 6-bit immediate address.
ULPI HS USB host and peripheral transceiver
SESS_END
1
0
X
X
RxError
0
0
1
X
ISP1505A; ISP1505C
Section
BUS
Figure
state, see
9.5.2.1.
6. For details and diagrams,
Section
SESS_VLD
0
0
1
X
HostDisconnect
0
0
0
1
Section
9.5.2.3.
© NXP B.V. 2006. All rights reserved.
9.5.2.2.
A_VBUS_VLD
0
0
0
1
Table
9.
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