adav802 Analog Devices, Inc., adav802 Datasheet - Page 37

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adav802

Manufacturer Part Number
adav802
Description
Audio Codec For Recordable Dvd
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
Table 49. Receiver Error Mask Register
ADDRESS = 0011001
RxValidity Mask
Emphasis Mask
NonAudio Mask
NonAudioPreamble
Mask
CRCError Mask
NoStream Mask
BiPhase/Parity Mask
Lock Mask
Table 50. Sample Rate Converter Error Register (Read Only)
ADDRESS = 0011010
TOO_SLOW
OVRL
OVRR
MUTE_IND
RES
7
This bit is set when the clock to the SRC is too slow, i.e. there are not enough clock cycles to complete the internal
convolution.
This bit will be set when the Left Output Data of the sample rate converter has gone over the full-scale range and has
been clipped. This bit will not be cleared until the register is read.
This bit will be set when the Right Output Data of the sample rate converter has gone over the full-scale range and has
been clipped. This bit will not be cleared until the register is read.
Mute Indicated. This bit is set when the SRC is in Fast Mode and clicks or pops may be heard in the SRC output data. The
output of the SRC can be muted, if required, until the SRC is in Slow Mode. Once read this bit will remain in its state and
not generate an interrupt until it has changed state.
RxValidity
Mask
7
Masks the RxValidity bit from generating an interrupt
0= The RxValidity bit will not generate an interrupt
1 = The RxVvalidity bit will generate and interrupt
Masks the Emphasis bit from generating an interrupt
0 = The Emphasis bit will not generate an interrupt
1 = The Emphasis bit will generate and interrupt
Masks the NonAudio bit from generating an interrupt
0 = The NonAudio bit will not generate an interrupt
1 = The NonAudio bit will generate and interrupt
Masks the NonAudio Preamble bit from generating an interrupt
0 = The NonAudio Preamble bit will not generate an interrupt
1 = The NonAudio Preamble bit will generate and interrupt
Masks the CRC Error bit from generating an interrupt
0 = The CRC Error bit will not generate an interrupt
1 = The CRC Error bit will generate and interrupt
Masks the NoStream bit from generating an interrupt
0 = The NoStream bit will not generate an interrupt
1 = The NoStream bit will generate an interrupt
Masks the BiPhase/Parity bit from generating an interrupt
0 = The BiPhase/Parity bit will not generate an interrupt
1 = The BiPhase/Parity bit will generate an interrupt
Masks the Lock bit from generating an interrupt
0 = The Lock bit will not generate an interrupt
1 = The Lock bit will generate an interrupt
RES
6
Emphasis
Mask
6
RES
5
Rev. Pr G | Page 37 of 53
Nonaudio
Mask
5
RES
4
NonAudio
Preamble
Mask
4
TOO_SLOW
3
CRC
Error
Mask
3
OVRL
2
Nostream
Mask
2
OVRR
1
BiPhase/
Parity
Mask
1
ADAV802
MUTE_IND
0
Lock
Mask
0

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