dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 38

• Manufacturer Part Number: dp8344b
• Description: Biphase Communications Processor?bcp
• Manufacturer: National Semiconductor Corporation

2 0 CPU Description
The WAIT pin can also be used to add wait states to BCP
instruction execution The CPU will be waited as long as
WAIT is low To wait a given instruction WAIT must be as-
serted low one-half T-state prior to the beginning of T2 in
the instruction to be affected Figure 2-26 shows WAIT as-
serted during a write to data memory In order to wait this
instruction WAIT must fall prior to the falling edge of CPU-
CLK in TX One wait state is added to the access and WAIT
rises prior to the falling edge of CPU-CLK in TW which al-
(Continued)
FIGURE 2-27 Two T-state Instruction WAIT Timing
FIGURE 2-26 Data Memory Access WAIT Timing
38
Figure 2-29 depict the use of WAIT with three other instruc-
lows the access to finish If WAIT had remained low the
access would have been held off indefinitely Programmed
wait states would delay when WAIT must be asserted since
they would delay the beginning of T2 Figures 2-27 through
tion types In all three cases WAIT is asserted one-half
T-state prior to when T2 would normally begin Also it is
evident that the effect of WAIT on instruction timing is iden-
tical to adding programmed wait states
TL F 9336 – E9
TL F 9336 – E8