dp8344b National Semiconductor Corporation, dp8344b Datasheet - Page 174

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dp8344b

Manufacturer Part Number
dp8344b
Description
Biphase Communications Processor?bcp
Manufacturer
National Semiconductor Corporation
Datasheet

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Interrupt
Control
(Continued)
Address
and
Data
Stacks
Arithmetic
Flags
6 0 Reference Section
6 2 3 Bit Definition Tables (Continued)
The following tables describe the location and function of all control and status bits in the various BCP addressable special
function registers The Remote Interface Configuration register
included
6 2 3 1 Processor (Continued)
IV15 – 8
RIS1 0
ASP3 – 0 Address Stack
DSP3 – 0 Data Stack
DS7 – 0
C
N
V
Z
Bit
Interrupt Vector
Receiver Interrupt ICR 7 6
Select
Pointer
Pointer
Data Stack
Carry
Negative
oVerflow
Zero
Name
(Continued)
IBR 7 – 0
ISP 7 – 4
ISP 3 – 0
DS 7 – 0
CCR 1
CCR 3
CCR 2
CCR 0
Location
Reset State
XXXX XXXX Data Stack Input Output port Stack is 16 bytes deep
0000 0000
0000
0000
11
0
0
0
0
174
RIC
The interrupt vector is obtained by concatenating IBR with
the vector address
Defines the source of the receiver interrupt
Address stack pointer Writing to this location changes the
value of the pointer
Data stack pointer Writing to this location changes the value
of the pointer
A high level indicates a carry or borrow generated by an
arithmetic instruction During a shift rotate operation the
state of the last bit shifted out appears in this location
A high level indicates a negative result generated by an
arithmetic logical or shift instruction
A high level indicates an overflow condition generated by an
arithmetic instruction
A high level indicates a zero result generated by an
arithmetic logical or shift instruction
High byte of interrupt and trap vectors
15
which is addressable only by a remote processor is not
NMI
Receiver
Transmitter
Line Turn Around
Bi-Directional
Timer
IBR
Interrupt
RIS1 0 Interrupt Source
0 0
0 1
1 0
1 1
Interrupt Vector
Function
RFF
DAV
(unused)
RA
8
a
a
0
Vector Address
RE
RE
0
0 1 1 1 0 0
0 0 0 1 0 0
0 0 1 0 0 0
0 0 1 1 0 0
0 1 0 0 0 0
0 1 0 1 0 0
5
vector address
0

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