mpc8555e Freescale Semiconductor, Inc, mpc8555e Datasheet - Page 34

• Manufacturer Part Number: mpc8555e
• Description: Mpc8555e Powerquicc Iii Processor With Integrated Security
• Manufacturer: Freescale Semiconductor, Inc

Local Bus
9.2
Table 30
enabled.
34
Local bus cycle time
LCLK[n] skew to LCLK[m] or LSYNC_OUT
Input setup to local bus clock (except
LUPWAIT)
LUPWAIT input setup to local bus clock
Input hold from local bus clock (except
LUPWAIT)
LUPWAIT input hold from local bus clock
LALE output transition to LAD/LDP output
transition (LATCH hold time)
Local bus clock to output valid (except
LAD/LDP and LALE)
Local bus clock to data valid for LAD/LDP
Local bus clock to address valid for LAD
Output hold from local bus clock (except
LAD/LDP and LALE)
Output hold from local bus clock for
LAD/LDP
Local bus clock to output high Impedance
(except LAD/LDP and LALE)
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
describes the general timing parameters of the local bus interface of the MPC8555E with the DLL
Local Bus AC Electrical Specifications
Parameter
Table 30. Local Bus General Timing Parameters—DLL Enabled
LWE[0:1] = 11 (default)
LWE[0:1] = 11 (default)
LWE[0:1] = 11 (default)
LWE[0:1] = 11 (default)
LWE[0:1] = 11 (default)
LWE[0:1] = 11 (default)
Configuration
LWE[0:1] = 00
LWE[0:1] = 00
LWE[0:1] = 00
LWE[0:1] = 00
LWE[0:1] = 00
LWE[0:1] = 00
7
Symbol
t
t
t
t
t
t
t
LBKSKEW
t
t
t
t
t
LBKHOV1
LBKHOV2
LBKHOV3
LBKHOX1
LBKHOX2
LBKHOZ1
LBIVKH1
LBIVKH2
LBIXKH1
LBIXKH2
LBOTOT
t
LBK
1
Min
6.0
1.8
1.7
0.5
1.0
1.5
0.7
1.6
0.7
1.6
—
—
—
—
—
Max
150
2.3
3.8
2.5
4.0
2.6
4.1
2.8
4.2
—
—
—
—
—
—
—
—
Freescale Semiconductor
Unit
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
3, 4, 8
3, 4, 8
7, 9
3, 4
3, 4
3, 8
3, 8
3, 8
3, 8
3, 8
5, 9
2
6