mpc8560vt667jb Freescale Semiconductor, Inc, mpc8560vt667jb Datasheet - Page 69

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mpc8560vt667jb

Manufacturer Part Number
mpc8560vt667jb
Description
Mpc8560 Powerquicc Iii Integrated Communications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Figure 48
window parameter DV. The data and frame bits are those that are associated with the clock. The figure
applies for all zero-crossings of the clock. All of the signals are differential signals. V
the transmitter and V
which the magnitude of the signal voltage is greater than or equal to the minimum DV voltage.
Figure 49
parameters are applied.
Freescale Semiconductor
shows the definitions of the data to clock static skew parameter t
shows the definition of the data to data static skew parameter t
Center point of the
data valid window of
the earliest allowed data
bit for data grouped
late with respect
to clock
D[0:7]/D[8:15], FRAME
D[0:7]/D[8:15], FRAME
ID
Center Point for Clock
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
V
V
for the receiver. The center of the eye is defined as the midpoint of the region in
D
D
Clock x
Clock x
CLK0 (CLK1)
Figure 49. Static Skew Diagram
Figure 48. Data to Clock Skew
t
SKEW,PAIR
1.0 UI Nominal
0.5 UI
t
SKEW,PAIR
0.5 UI
1.0 UI Nominal
0.5 DV
Eye Opening
DV
t
DPAIR
0.5 DV
DPAIR
SKEW,PAIR
Center point of the
data valid window of
the latest allowed data
bit for data grouped
late with respect
to clock
and how the skew
V
V
D
D
= 0 V
= 0 V
D
represents V
V
V
and the data valid
HDmim
HDmim
OD
RapidIO
for
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