mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 94

• Manufacturer Part Number: mc68hc908jw32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Monitor ROM (MON)
The COP module is disabled in monitor mode based on these conditions:
The second condition states that as long as V
mode, or if V
to IRQ), then the COP will be disabled. In the latter situation, after V
can be removed from the IRQ pin in the interest of freeing the IRQ for normal functionality in monitor
mode.
Enter monitor mode with pin configuration shown in
rising edge of RST latches monitor mode. Once monitor mode is latched, the values on the specified pins
can change (except for PTA1, where it should be held until after security, see
Once out of reset, the MCU waits for the host to send eight security bytes. (See
security bytes, the MCU sends a break signal (10 consecutive logic 0s) to the host, indicating that it is
ready to receive a command.
In monitor mode, the MCU uses different vectors for reset, SWI (software interrupt), and break interrupt
than those for user mode. The alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 7-2
7.3.2 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
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If monitor mode was entered as a result of the reset vector being blank (above condition set 2 or
3), the COP is always disabled regardless of the state of IRQ or RST.
If monitor mode was entered with V
as V
summarizes the differences between user mode and monitor mode vectors.
TST
TST
Exiting monitor mode after it has been initiated by having a blank reset
vector requires a power-on reset (POR). Pulling RST low will not exit
monitor mode in this situation.
is applied to either IRQ or RST.
START
is applied to RST after the initial reset to get into monitor mode (when V
BIT
Modes
Monitor
User
BIT 0
BIT 1
Table 7-2. Mode Differences (Vectors)
Vector
$FFFE
$FEFE
Reset
High
Figure 7-2. Monitor Data Format
BIT 2
MC68HC908JW32 Data Sheet, Rev. 5
BIT 3
TST
Vector
$FFFF
$FEFF
Reset
Low
on IRQ (condition set 1), then the COP is disabled as long
TST
BIT 4
NOTE
is maintained on the IRQ pin after entering monitor
Figure 7-1
$FEFC
Vector
$FFFC
Break
High
BIT 5
Functions
BIT 6
Vector
$FFFD
$FEFD
Break
by pulling RST low and then high. The
Low
BIT 7
TST
is applied to the RST pin, V
$FEFC
Vector
$FFFC
STOP
High
SWI
BIT
7.4
START
NEXT
7.4
BIT
Security).
Vector
$FFFD
$FEFD
Freescale Semiconductor
Security.) After the
Low
SWI
TST
was applied
TST