mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 81

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mc68hc908jw32

Manufacturer Part Number
mc68hc908jw32
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared). (See
6.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a hardware interrupt begins after
completion of the current instruction. When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the condition code register) and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
Freescale Semiconductor
AS MANY INTERRUPTS
AS EXIST ON CHIP
YES
Figure 6-10. Interrupt Processing
INSTRUCTION?
INSTRUCTION?
INSTRUCTION
FROM RESET
MC68HC908JW32 Data Sheet, Rev. 5
INTERRUPT?
FETCH NEXT
INTERRUPT?
I-BIT SET?
I BIT SET?
BREAK
IRQ1
SWI
RTI
NO
NO
NO
NO
NO
Figure
YES
YES
YES
YES
LOAD PC WITH INTERRUPT VECTOR
UNSTACK CPU REGISTERS
6-10.)
EXECUTE INSTRUCTION
STACK CPU REGISTERS
SET I-BIT
Exception Control
81

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