mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 80

• Manufacturer Part Number: mc68hc908jw32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
6.4.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP instruction clears the SIM counter. After
an interrupt, break, or reset, the SIM senses the state of the short stop recovery bit, SSREC, in the mask
option register. If the SSREC bit is a logic 1, then the stop recovery is reduced from the normal delay of
4096 CGMXCLK cycles down to 32 CGMXCLK cycles. This is ideal for applications using canned
oscillators that do not require long start-up times from stop mode. External crystal applications should use
the full stop recovery time, that is, with SSREC cleared.
6.4.3 SIM Counter and Reset States
External reset has no effect on the SIM counter.
free-running after all reset states.
internal reset recovery sequences.)
6.5 Exception Control
Normal, sequential program execution can be changed in three different ways:
6.5.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction recovers
the CPU register contents from the stack so that normal processing can resume.
interrupt entry timing, and
80
INTERRUPT
INTERRUPT
•
•
•
MODULE
MODULE
I-BIT
I-BIT
R/W
Interrupts:
–
–
Reset
Break interrupts
R/W
IAB
IDB
IAB
IDB
Maskable hardware CPU interrupts
Non-maskable software interrupt instruction (SWI)
DUMMY
DUMMY
Figure 6-9
SP – 4
SP
PC – 1[7:0] PC – 1[15:8]
Figure 6-9. Interrupt Recovery Timing
CCR
(See 6.3.2 Active Resets from Internal Sources
Figure 6-8. Interrupt Entry Timing
MC68HC908JW32 Data Sheet, Rev. 5
SP – 1
SP – 3
shows interrupt recovery timing.
A
SP – 2
SP – 2
(See 6.6.2 Stop Mode
X
X
SP – 3
SP – 1
PC – 1[15:8] PC – 1[7:0]
A
SP – 4
SP
CCR
VECT H
PC
for details.) The SIM counter is
V DATA H
OPCODE
VECT L
PC + 1
OPERAND
V DATA L
for counter control and
Figure 6-8
Freescale Semiconductor
START ADDR
OPCODE
shows