mc68hc908jw32 Freescale Semiconductor, Inc, mc68hc908jw32 Datasheet - Page 169

• Manufacturer Part Number: mc68hc908jw32
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

DDRA[7:0] — Data Direction Register A Bits
Figure 13-4
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a
logic 0, reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
These read/write bits control port A data direction. Reset clears DDRA[7:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
shows the port A I/O logic.
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
DDRA
Bit
0
1
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
X
X
(1)
Table 13-2. Port A Pin Functions
RESET
MC68HC908JW32 Data Sheet, Rev. 5
Figure 13-4. Port A I/O Circuit
I/O Pin Mode
Input, Hi-Z
Output
Table 13-2
(2)
NOTE
DDRAx
PTAx
Accesses to
Read/Write
DDRA[7:0]
DDRA[7:0]
DDRA
summarizes the operation of the port A pins.
PTA[7:0]
Read
Pin
Accesses to PTA
PTA[7:0]
PTA[7:0]
Write
PTAx
(3)
Port A
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