mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 98

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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System Integration Module (SIM)
8.4.1 External Pin Reset
Technical Data
98
OSCOUT
RST
IAB
PC
All of these resets produce the vector $FFFE–FFFF ($FEFE–FEFF in
monitor mode) and assert the internal reset signal (IRST). IRST causes
all registers to be returned to their default values and all modules to be
returned to their reset states.
An internal reset clears the SIM counter (see
external reset does not. Each of the resets sets a corresponding bit in
the reset status register (RSR). (See
The RST pin circuit includes an internal pullup device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the reset
status register (RSR) is set as long as RST is held low for a minimum of
67 OSCXCLK cycles, assuming that neither the POR nor the LVI was the
source of the reset. See
relative timing.
Figure 8-4. External Reset Timing
Reset Type
All others
POR/LVI
System Integration Module (SIM)
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Table 8-2. PIN Bit Set Timing
Table 8-2
Number of Cycles Required to Set PIN
VECT H
for details.
8.8 SIM
4163 (4096 + 64 + 3)
VECT L
67 (64 + 3)
8.5 SIM
Registers.)
Figure 8-4
Freescale Semiconductor
Counter), but an
shows the

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