mc68hc908jb8 Freescale Semiconductor, Inc, mc68hc908jb8 Datasheet - Page 243

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mc68hc908jb8

Manufacturer Part Number
mc68hc908jb8
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Technical Data — MC68HC908JB8•MC68HC08JB8•MC68HC08JT8
16.1 Contents
16.2 Introduction
16.3 Functional Description
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
16.2
16.3
16.4
16.5
16.5.1
16.5.2
This section describes the low-voltage inhibit module (LVI), which
monitors the voltage on the V
voltage falls to the LVI trip (V
Figure 16-1
after a reset. The LVI module contains a bandgap reference circuit and
comparator. Setting LVI disable bit (LVID) disables the LVI to monitor
V
The LVI module generates one output signal:
LVI Reset — an reset signal will be generated to reset the CPU when
V
DD
DD
voltage.
drops to below the set trip point.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .243
LVI Control Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . .244
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .244
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .244
Section 16. Low Voltage Inhibit (LVI)
shows the structure of the LVI module. The LVI is enabled
Low Voltage Inhibit (LVI)
DD
LVR
pin and generates a reset when the V
) voltage.
Technical Data
DD
243

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