dsp56167 Freescale Semiconductor, Inc, dsp56167 Datasheet - Page 82

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dsp56167

Manufacturer Part Number
dsp56167
Description
Advance Information 16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Design Considerations
Analog I/O Considerations
4-6
V
Digital Ground and Power Planes
Figure 4-2 shows three possible output configurations. Configuration A is highly
recommended, because the termination impedance between SPKP and SPKM is
matched. Configurations B and C require an AC coupling capacitor because the load
resistor is tied to V
Figure 4-3 shows a recommended layout for power and ground planes. A four-layer
board is recommended. The top layer (directly under the parts) and the bottom layers
should be interconnected layers. The two center layers should be power and ground.
Ground and power planes should be completely separated, and the digital and
analog power/ground planes should not overlap. All codec pins and all codec signal
traces should be over the analog planes. The analog planes should not encompass any
digital pins.
SSA
20 k
V
DDA
84
1
+
Figure 4-3 Recommended Ground and Power Plane Layout
VRDA
(a)
20 k
40 k
Figure 4-2 Codec Output Configurations
SSA
SPKP
SPKM
.
DSP56167/D, Rev. 1
0 < C
30 nF
1.5 k
(b)
Analog Ground and Power Planes
NC
57
28
SPKP
SPKM
0 < C
0 < C
30 nF
30 nF
1.5 k
1.5 k
(c)
SPKP
SPKM
MOTOROLA
AA0799

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