adsp-21364bbc Analog Devices, Inc., adsp-21364bbc Datasheet - Page 41

• Manufacturer Part Number: adsp-21364bbc
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

SPI Interface—Master
The ADSP-2136x contains two SPI ports. The primary has dedi-
cated pins and the secondary is available through the DAI. The
timing provided in
Table 39. SPI Interface Protocol—Master Switching and Timing Specifications
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
SSPIDM
SSPIDM
HSPIDM
SPICLKM
SPICHM
SPICLM
DDSPIDM
DDSPIDM
HDSPIDM
SDSCIM
SDSCIM
HDSM
SPITDM
CPHASE = 1
CPHASE = 0
Data Input Valid to SPICLK Edge (Data Input Setup Time)
Data Input Valid to SPICLK Edge (Data Input Setup Time) (SPI2)
SPICLK Last Sampling Edge to Data Input Not Valid
Serial Clock Cycle
Serial Clock High Period
Serial Clock Low Period
SPICLK Edge to Data Out Valid (Data Out Delay Time)
SPICLK Edge to Data Out Valid (Data Out Delay Time) (SPI2)
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
FLAG3–0IN (SPI Device Select) Low to First SPICLK Edge
FLAG3–0IN (SPI Device Select) Low to First SPICLK Edge (SPI2)
Last SPICLK Edge to FLAG3–0IN High
Sequential Transfer Delay
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
FLAG3-0
SPICLK
(CP = 0)
SPICLK
(CP = 1)
MOSI
(INPUT)
MOSI
(INPUT)
MISO
MISO
Table 39
t
S S P I D M
and
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
t
S D S C I M
Table 40
VALID
MSB
t
t
MSB
S P I C H M
S P I C L M
applies to both.
VALID
MSB
t
H S P I D M
t
t
D D S P I D M
t
t
S S P I D M
MSB
S P I C L M
S P I C H M
Rev. D | Page 41 of 56 | April 2008
Figure 34. SPI Master Timing
t
D D S P I D M
t
H S P I D M
t
H D S P I D M
t
t
S S P I D M
HDSPIDM
t
VALID
S P I C L K M
LSB
LSB
VALID
LSB
4 × t
Min
5.2
8.2
2
8 × t
4 × t
4 × t
4 × t
4 × t
4 × t
4 × t
K and B Grade
t
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
H D S M
LSB
– 2
– 2
– 2
– 2
– 2.5
– 2.5
– 2
– 1
t
H S P I D M
Max
3.0
8.0
t
S P I T D M
9.5
2
Min
6.2
8 × t
4 × t
4 × t
4 × t
4 × t
4 × t
4 × t
4 × t
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
Y Grade
– 2
– 2
– 2
– 2
– 3.0
– 3.0
– 2
– 1
Max
3.0
9.5
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns