cs4237b Cirrus Logic, Inc., cs4237b Datasheet - Page 57

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cs4237b

Manufacturer Part Number
cs4237b
Description
Crystalclear Advanced Audio System With 3d Sound
Manufacturer
Cirrus Logic, Inc.
Datasheet

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SOUND BLASTER INTERFACE
The Sound Blaster Pro compatible interface is
the third physical device in logical device 0.
Since the WSS Codec and the Sound Blaster are
mutually exclusive, the WSS Codec interrupt
and playback DMA channel are shared with the
Sound Blaster interface. To map volume controls
properly, the external devices: synthesizer (when
used), CDROM, etc., must be connected to the
proper analog inputs as illustrated in Figure 5.
Mode Switching
To facilitate switching between different func-
tional modes (i.e. Sound Blaster and Windows
Sound System), logic is included to handle the
switch transparently to the host. No special soft-
ware is required on the host side to perform the
mode switch.
DS213PP4
SBbase+A
SBbase+C
SBbase+C
SBbase+E
SBbase+0
SBbase+0
SBbase+1
SBbase+2
SBbase+2
SBbase+3
SBbase+4
SBbase+5
SBbase+6
SBbase+8
SBbase+8
SBbase+9
Address
Table 19. Sound Blaster Pro Compatible I/O Interface
Right FM Register Status Port
Left FM Register Status Port
Data Available Status (Bit 7)
Write Buffer Status (Bit 7)
Mixer Register Address
Command/Write Data
Right FM Status Port
Right FM Status Port
Left FM Status Port
Left FM Data Port
FM Register port
Mixer Data Port
Read Data Port
FM Status Port
FM Data Port
Description
Reset
Sound Blaster Direct Register Interface
The Sound Blaster software interface utilizes 10-
bit address decoding and is compatible with
Sound Blaster and Sound Blaster Pro interfaces.
10-bit addressing requires that the upper address
bits be 0 to decode a valid address, i.e. no alias-
ing occurs. This device requires 16 I/O locations
located at the PnP address ’SBbase’. The follow-
ing registers, shown in Table 19, are provided
for Sound Blaster compatibility.
Left/Right FM Registers,
SBbase+0 - SBbase+3
These registers are mapped directly to the appro-
priate FM synthesizer registers.
Mixer Address Register,
SBbase+4, write only
This register is used to specify the index address
for the mixer. This register must be written be-
fore any data is accessed from the mixer
registers. The mixer indirect register map is
shown in Table 20.
Read/Write
Write Only
Write Only
Write Only
Read Only
Write Only
Read Only
Write Only
Read
Write
Read
Read
Read
Type
Write
Write
Write
CS4237B
57

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