EMD56324P Emlsi Inc., EMD56324P Datasheet - Page 43

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EMD56324P

Manufacturer Part Number
EMD56324P
Description
256m 8m X 32 Mobile Ddr Sdram
Manufacturer
Emlsi Inc.
Datasheet
Power up & Initialization Sequence
VDD
VDDQ
CK
CKB
CKE
COMMAND
DM
A0-A9,
A11
A10
BA0, BA1
DQS
DQ
Notes: 1. PRE = PRECHARGE command, MRS = LOAD MODE REGISTER command, AR = AUTO REFRESH command
2. NOP or DESELECT commands are required for at least 200us.
3. Other valid commands are possible.
4. NOPs or DESELECTs are required during this time.
LVCMOS HIGH LEVEL
ACT = ACTIVE command, RA = Row address, BA = Bank address
High-Z
High-Z
V
Power-up:
DD
NOP
and CK stable
T=200us
2
t
IS
NOP
t
IH
t
CH
t
CK
t
CL
PRE
t
RP
4
43
AR
t
RFC
4
AR
t
RFC
Register
t
t
t
BA0=L
BA1=L
4
IS
CODE
CODE
IS
IS
Load
Mode
MRS
256M: 8M x 32 Mobile DDR SDRAM
t
t
t
IH
IH
IH
t
MRD
Extended
Register
BA0=H
BA1=L
EMRS
CODE
CODE
4
Mode
t
MRD
4
EMD56324P
ACT
RA
RA
BA
Preliminary
NOP
3
Rev 0.0
NOP

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