EMD56324P Emlsi Inc., EMD56324P Datasheet - Page 22

• Manufacturer Part Number: EMD56324P
• Description: 256m 8m X 32 Mobile Ddr Sdram
• Manufacturer: Emlsi Inc.

Operations
Bank/Row Activation
The Bank Activation command is issued by holding CASB and WEB high with
the clock(CK). The DDR SDRAM has four independent banks, so two bank select addresses(BA0, BA1) are required.
The Bank Activation command must be applied before any READ or WRITE operation is executed. The delay from the
Bank Activation command to the first READ or WRITE command must meet or exceed the minimum of RAS to CAS
delay time(tRCD min). Once a bank has been activated, it must be precharged before another Bank Activation com-
mand can be applied to the same bank. The minimum time interval between interleaved Bank Activation com-
mands(Bank A to Bank B and vice versa) is the Bank to Bank delay time(tRRD min).
Command
Address
Bank Activation Command Cycle
CKB
CK
Row Address
Activate
Bank A
Bank A
0
RAS - CAS delay(t
NOP
1
NOP
RCD
2
)
Precharge
Col. Addr.
with Auto
Bank A
Write
3
Row Cycle Time(tRC)
22
Row Addr.
256M: 8M x 32 Mobile DDR SDRAM
Activate
Bank B
Bank B
CSB
RAS - RAS delay time(t
Tn
and RASB low at the rising edge of
NOP
Tn+1
EMD56324P
Preliminary
Row. Addr.
RRD
Activate
Bank A
Bank A
)
Tn+2
Rev 0.0
: Don't care