EMD56324P Emlsi Inc., EMD56324P Datasheet - Page 16
EMD56324P
Manufacturer Part Number
EMD56324P
Description
256m 8m X 32 Mobile Ddr Sdram
Manufacturer
Emlsi Inc.
Datasheet
1.EMD56324P.pdf
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Table 14: Register Programmed with Extended MRS
NOTE :
1. RFU(Reserved for future use) should stay “0” during MRS and EMRS cycle.
Table 15: EMRS for PASR(Partial Array Self Refresh) & DS(Driver Strength)
Table 16: Internal Temperature Compensated Self Refresh (TCSR)
NOTE :
1. In order to save power consumption, Mobile DDR SDRAM includes the internal temperature sensor and control units to control the
2. If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
3. It has +/- 5 ℃ tolerance.
BA1
Address
Function
self refresh cycle automatically according to the two temperature range : Max 85℃, Max 45℃
Temperature Range
0
0
1
1
Max 85℃
Max 45℃
BA0
0
1
0
1
BA1
Mode Select
Mode Select
EMRS for DDR SDRAM
Normal MRS
Reserved
Reserved
BA0
MODE
Full Array
A11 ~ A10/AP
400
250
A6
0
0
1
1
Self Refresh Current (I
RFU
Driver Strength
A9
A5
0
1
0
1
*1
1/2 of Full Array
A8
300
200
Reserved
16
Strength
Driver
Full
1/2
1/4
A7
DD
6)
A2
A6
0
0
0
0
1
1
1
1
DS
1/4 of Full Array
256M: 8M x 32 Mobile DDR SDRAM
A1
0
0
1
1
0
0
1
1
A5
250
150
A0
0
1
0
1
0
1
0
1
A4
RFU
PASR
*1
Size of Refreshed Array
EMD56324P
A3
1/2 of Full Array
1/4 of Full Array
Preliminary
Full Array
Reserved
Reserved
Reserved
Reserved
Reserved
A2
Unit
PASR
㎂
A1
Rev 0.0
A0
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