S25FL129P Meet Spansion Inc., S25FL129P Datasheet - Page 38

• Manufacturer Part Number: S25FL129P
• Description: 128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
• Manufacturer: Meet Spansion Inc.

9.9
9.10
38
Write Enable (WREN)
Write Disable (WRDI)
The Write Enable (WREN) command (see
enables the device to accept a Write Status Register, program, or erase command. The WEL bit must be set
prior to every Page Program (PP), Quad Page Program (QPP), Parameter Sector Erase (P4E, P8E), Erase
(SE or BE), Write Registers (WRR) and OTP Program (OTPP) command.
The host system must first drive CS# low, write the WREN command, and then drive CS# high.
The Write Disable (WRDI) command (see
disables the device from accepting a Page Program (PP), Quad Page Program (QPP), Parameter Sector
Erase (P4E, P8E), Erase (SE, BE), Write Registers (WRR) and OTP Program (OTPP) command. The host
system must first drive CS# low, write the WRDI command, and then drive CS# high.
Any of following conditions resets the WEL bit:
Power-up
Write Disable (WRDI) command completion
Write Registers (WRR) command completion
Page Program (PP) command completion
Quad Page Program (QPP) completion
Parameter Sector Erase (P4E, P8E) completion (applicable for the uniform 64 KB sector device only)
Sector Erase (SE) command completion
Bulk Erase (BE) command completion
OTP Program (OTPP) completion
CS#
SCK
SO
SI
Figure 9.11 Write Enable (WREN) Command Sequence
Figure 9.12 Write Disable (WRDI) Command Sequence
SCK
CS#
SO
SI
D a t a
Mode 3
Mode 0
Mode 3
Mode 0
Hi-Z
Hi-Z
S25FL129P
S h e e t
Figure
Figure
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
9.12) resets the Write Enable Latch (WEL) bit to a 0, which
9.11) sets the Write Enable Latch (WEL) bit to a 1, which
Command
Command
( P r e l i m i n a r y )
S25FL129P_00_04 November 2, 2009