S25FL129P Meet Spansion Inc., S25FL129P Datasheet - Page 17

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S25FL129P

Manufacturer Part Number
S25FL129P
Description
128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet

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7.9
November 2, 2009 S25FL129P_00_04
Status Register Block
Status Register Block
BP2
BP2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BP1
BP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Data Protection Modes
BP0
BP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Spansion SPI Flash memory devices provide the following data protection methods:
The Write Enable (WREN) command: Must be written prior to any command that modifies data. The
WREN command sets the Write Enable Latch (WEL) bit. The WEL bit resets (disables writes) on power-up
or after the device completes the following commands:
Software Protected Mode (SPM): The Block Protect BP2, BP1, BP0 bits define the section of the
memory array that can be read but not programmed or erased.
and address ranges of protected areas that are defined by Status Register bits BP2:BP0.
Hardware Protected Mode (HPM): The Write Protect (W#/ACC) input and the Status Register Write
Disable (SRWD) bit together provide write protection.
Clock Pulse Count: The device verifies that all program, erase, and Write Register commands consist of
a clock pulse count that is a multiple of eight before executing them.
FC0000h - FFFFFFh
F80000h - FFFFFFh
F00000h - FFFFFFh
E00000h - FFFFFFh
C00000h - FFFFFFh
– Page Program (PP)
– Sector Erase (SE)
– Bulk Erase (BE)
– Write Disable (WRDI)
– Write Register (WRR)
– Parameter 4 KB Sector Erase (P4E)
– Parameter 8 KB Sector Erase (P8E)
– Quad Page Programming (QPP)
– OTP Byte Programming (OTPP)
800000h - FFFFFFh
000000h - FFFFFFh
000000h - 03FFFFh
000000h - 07FFFFh
000000h - 0FFFFFh
000000h - 1FFFFFh
000000h - 3FFFFFh
000000h - 7FFFFFh
000000h - FFFFFFh
Address Range
Address Range
Protected
Protected
None
None
D a t a
Table 7.4 TBPROT = 1 (Starts Protection from BOTTOM of Array)
Table 7.3 TBPROT = 0 (Starts Protection from TOP of Array)
(128)SA255:SA128 (32)SA63:SA32 000000h - 7FFFFFh
(128)SA0:SA127
(256)SA0:SA255
(16) SA255:SA240
(32) SA255:SA224
(64)SA255:SA192
S h e e t
(4) SA255:SA252
(8) SA255:SA248
(256)SA255:SA0
(16)SA0:SA15
(32)SA0:SA31
(64)SA0:SA63
(4) SA0:SA3
(8) SA0:SA7
Uniform
Uniform
64 KB
64 KB
Protected Sectors
0
Protected Sectors
0
( P r e l i m i n a r y )
(16)SA0:SA15
(32)SA0:SA31
(64)SA0:SA63
(4)SA0:SA3
(8)SA0:SA7
(2)SA0:SA1
(16)SA63:SA48 000000h - BFFFFFh SA191:SA0 SA47:SA0
(2)SA63:SA62
(4)SA63:SA60
(8)SA63:SA56
(64)SA63:SA0
Uniform
256 KB
(1) SA0
S25FL129P
Memory Array
Memory Array
(1) SA63
Uniform
256 KB
0
0
000000h - FFFFFFh
040000h - FFFFFFh
080000h - FFFFFFh
100000h - FFFFFFh
200000h - FFFFFFh
400000h - FFFFFFh
800000h - FFFFFFh
Address Range
000000h - DFFFFFh SA223:SA0 SA55:SA0
000000h - FFFFFFh SA255:SA0 SA63:SA0
000000h - FBFFFFh SA251:SA0 SA62:SA0
000000h - F7FFFFh
000000h - EFFFFFh SA239:SA0 SA59:SA0
Unprotected
Address Range
Unprotected
None
None
Table 7.3
SA16:SA255
SA32:SA255
SA64:SA255
SA0:SA255
SA4:SA255
SA8:SA255
SA128:255
Uniform
SA247:SA0 SA61:SA0
SA127:SA0 SA31:SA0
64 KB
None
Uniform
64 KB
None
Unprotected
Unprotected
Sectors
and
Sectors
SA16:SA63
SA32:SA63
SA4:SA63
SA8:SA63
SA0:SA63
SA1:SA63
SA2:SA63
Table 7.4
Uniform
256 KB
Uniform
256 KB
None
None
shows the sizes
Protected Portion of
Protected Portion of
Total Memory Area
Total Memory Area
1/64
1/32
1/16
1/64
1/32
1/16
1/8
1/4
1/2
1/8
1/4
1/2
All
All
0
0
17

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