SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 25

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SB16C1058-TQFP128

Manufacturer Part Number
SB16C1058-TQFP128
Description
Octal-uart Controller With 256-byte Fifo
Manufacturer
IK Semicon Co., Ltd
Datasheet
ISR[7]
ISR[7]
Figure 5:
0
1
TCR
TCR
01h
00h
nTXRDY/nTXRDY[7:0] and nRXRDY/nRXRDY[7:0] in DMA mode 0/FIFO disable.
6.7 DMA Operation
6.7.1 Single DMA transfer (DMA Mode 0/FIFO Disable)
TX FIFO EMPTY
Character #1
TX FIFO
EMPTY
SPACE
Transmitter and Receiver DMA operation is available through nTXRDY, nRXRDY,
nTXRDY[7:0], and nRXRDY[7:0]. There are two modes of DMA operation, DMA mode 0
or DMA mode 1, selected by FCR[3].
In DMA mode 0 or FIFO disable (FCR[3] = 0), DMA occurs in single character transfer. In
DMA mode 1, multi-character DMA transfers are managed to relieve the CPU for longer
periods of time.
Transmitter: There are no character in TX FIFO or THR. And the nTXRDY[7:0] signals will
be in assert state. nTXRDY[7:0] will switch to deassert state after one character is loaded
into TX FIFO or THR.
Receiver: There is at least one character in RX FIFO or RHR. And the nRXRDY[7:0]
signals will be in assert state. Once nRXRDY is asserted, nRXRDY[7:0] signal will switch
to deassert state when there are no more characters in RX FIFO or RBR.
Figure 5 shows nTXRDY, nTXRDY[7:0], nRXRDY, and nRXRDY[7:0] in DMA mode
0/FIFO disable.
AT LEAST ONE
LOCATION FILLED
nTXRDY,n
TXRDY[7:0]
nTXRDY,n
TXRDY[7:0]
OCTAL UART WITH 256-BYTE FIFO
ISR[6]
ISR[6]
0
0
RCR
RCR
01h
00h
RX FIFO EMPTY
Character #1
RX FIFO
EMPTY
SPACE
IN16C1058
JUNE 2009
AT LEAST ONE
LOCATION FILLED
nRXRDY,n
RXRDY[7:0]
nRXRDY,n
RXRDY[7:0]
REV 1.0
25

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